Contents of Report

[Data of Report]

Report Number:: TR0704
Date of Registration:: 1991.10
English Title:: Hardware Implementation of Dynamic Load Balancing in the Parallel Inference Machine PIM/c
Japanese Title:: ***
English Author:: T.Nakagawa,N.Ido,T.Tarui,M.Asaie,M.Sugie
Japanese:: ***
Name of Organization to which author belongs:: Hitachi,Hitachi,Hitachi,Hitachi,Hitachi
PDF:: tr0704.pdf

	Abstract	.... 2
1	Introduction	.... 2
2	Outline of PIM/c Hardware Features	.... 3
3	Load Balancing in Each Hierarchy	.... 4
3.1	Load balancing in TCMP	.... 4
3.2	Load balancing in LCMP	.... 6
4	Evaluation Strategy	.... 7
4.1	Evalaution on the Real Hardware	.... 7
4.2	Evalaution using an Artificial Load Model	.... 8
5	Evaluation Results	.... 8
5.1	Evalaution in the TCMP Hierarchy	.... 8
5.2	Evaluation in the LCMP Hierarchy	.... 10
6	Conclusion	.... 12
	Acknowledgements	.... 12
	Reference	.... 13
	End	.... 14

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