| Abstract | .... 2 | |
| 1 | Introduction | .... 2 |
| 2 | Target Language | .... 3 |
| 3 | Excution Models | .... 3 |
| 4 | Machine Architecture | .... 5 |
| 4.1 | Packet Format | .... 5 |
| 4.2 | Configuration of Processing Element Module | .... 6 |
| 4.3 | Configuration of the Structure Memory Module | .... 7 |
| 4.4 | Process Allocation | .... 8 |
| 5 | Evaluation Results | .... 8 |
| 6 | Conclusion | .... 9 |
| Acknowledgements | .... 9 | |
| References | .... 9 |
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