| Abstract | .... 2 | |
| 1 | Introduction | .... 2 |
| 2 | Overview of the Delta Architecture | .... 4 |
| 3 | Overview of the RDBE Architecture | .... 5 |
| 4 | Design Considerations of the RDBE | .... 6 |
| 4.1 | Treatment of the Null Tuple | .... 6 |
| 4.2 | Data Length | .... 6 |
| 4.3 | Data Type | .... 7 |
| 4.4 | Ordering of the Key Field | .... 7 |
| 4.5 | Field Selection | .... 7 |
| 5 | Design and Implementation of the Sorter | .... 8 |
| 5.1 | The Straight Two-way Merge-sort Algorithm | .... 8 |
| 5.2 | Design Detail | .... 9 |
| 6 | Design and Implementation | .... 12 |
| 6.1 | The Hardware Pipeline Algorithm | .... 13 |
| 6.2 | Contorol ROM | .... 16 |
| 6.3 | Design Detail | .... 16 |
| 7 | Performance Estimation | .... 17 |
| 7.1 | Sort Operation | .... 17 |
| 7.2 | Join-Equal Operation | .... 18 |
| 8 | Conclusion | .... 18 |
| Acknowledgements | .... 19 | |
| References | .... 19 | |
| Figures | .... 20 | |
| End | .... 23 |
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