| Abstract | .... 3 | |
| 1 | Backguround and Introduction | .... 3 |
| 2 | Architecture | .... 4 |
| 3 | Hardware Configuration | .... 8 |
| 4 | Function Distribution of Delta | .... 11 |
| 4.1 | Software Configuration | .... 11 |
| 4.2 | A Sample Transaction Processing Flow | .... 16 |
| 5 | Delta in a Logic Programming Research Environment | .... 21 |
| 6 | Conclusion | .... 25 |
| 7 | Acknowledgements | .... 25 |
| References | .... 25 | |
| End | .... 26 |
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